The present invention relates to a semiconductor device and a manufacturing method thereof. More particularly, the present invention relates to a technique effectively applied to a semiconductor device in which a part of a gate dielectric of a MISFET (Metal Insulator Semiconductor Field Effect Transistor) is composed of a dielectric film of high permittivity.
In a device where a thickness of a gate dielectric scaled by the ratio of its dielectric constant to that of silicon oxide (hereinafter, also referred to as equivalent oxide thickness (EOT)) is about 3 nm or larger, a silicon oxide (SiO2) film has been consistently used as a material of a gate dielectric of a semiconductor device using a MIS transistor.
However, when the equivalent oxide thickness of a gate dielectric is reduced to less than 3 nm as a result of the advancement of the film thickness reduction of the gate dielectric with an aim to achieve higher device speed, the direct-tunneling current flowing through the gate dielectric is evidently observed. Consequently, the gate leakage current is increased to the extent that cannot be ignored in view of the power saving.
For the solution of the problem, various attempts to reduce the direct-tunneling current have been carried out, that is, a metal oxide material having a dielectric constant higher than that of silicon oxide is used as a gate dielectric so as to increase the physical thickness of the gate dielectric even though the equivalent oxide thickness is almost equal to that of silicon oxide. For example, various approaches have been taken such as that disclosed on page 27 of IEDM Technical Digest in 2000 by C. H. Lee et al., in which a ZrO2 film is used, and that disclosed on page 35 of IEDM Technical Digest in 2000 by Laegu Kang et al., in which an HfO2 film is used.
It is well known that, when using a high dielectric film made of metal oxide as a gate dielectric, to keep both the EOT and the gate leakage current low and to ensure an interfacial property are important objects to be achieved. In addition, when taking the mounting to a product into consideration, it is apparent that to ensure the smoothness on a surface of the gate dielectric is also an extremely important object for reducing the characteristic variation between the devices.
Since the gate dielectric is needed to have small charge trapping states at the interface with a silicon substrate, it is preferable to use the chemical vapor deposition method (CVD method) in which damages on the silicon substrate at the deposition of a film are small, more particularly, the thermal chemical vapor deposition method is preferable as a forming method of a gate dielectric made of metal oxide. However, according to the examinations made by the inventors of this application, since the TiO2 film and the ZrO2 film formed by the thermal CVD method are polycrystalline, the smoothness on the film surface is insufficient, and the TiO2 film and the ZrO2 film are not suitable for practical use.
An object of the present invention is to provide a technique capable of improving the smoothness on the surface of a gate dielectric made of metal oxide.
Another object of the present invention is to provide a technique capable of reducing the leakage current in the gate dielectric made of metal oxide.
Another object of the present invention is to provide a technique capable of improving the current drivability of a MISFET having the gate dielectric made of metal oxide.
Another object of the present invention is to provide a technique capable of reducing the characteristic variation in the MISFETs having the gate dielectric made of metal oxide.
The above and other objects and novel characteristics of the present invention will be apparent from the description and the accompanying drawings of this specification.
For solving the above-described problem about the smoothness on the surface of the gate dielectric made of metal oxide, it is considered effective to form a film having an amorphous structure at least at the time immediately after the deposition.
Also, it is well known that, since metal oxide films such as a TiO2 film and a ZrO2 film deposited by the CVD method have many oxygen vacancies therein and have poor insulation properties at the time immediately after the deposition, it is necessary to perform some kind of oxidation processes for alteration after the deposition of the films. Therefore, it is more preferable if the amorphous structure can be maintained even after the oxidation processes for alteration because it is possible to proceed to the next step of forming electrode without reducing the smoothness on the surface.
Furthermore, it is estimated that, if the gate dielectric maintains the amorphous structure even after the final step of the manufacturing process (wafer process) of the semiconductor device, it is possible to further improve the smoothness of the gate dielectric in a finished state. In this case, however, restrictions on the processes are increased, for example, the thermal budget applied in a process after forming the gate dielectric is restricted.
As specific means for realizing the surface smoothness of the gate dielectric made of metal oxide, the inventors use the plasma enhanced CVD method, in which damages on a silicon substrate are small, to form a TiO2 film or a ZrO2 film having an amorphous structure. In this manner, it is possible to realize the good smoothness on the surface of the gate dielectric.